| Code | Relative drive | |------|----------------| | X0.5 | Ultra-weak | | X1 | Unit drive | | X2 | 2× unit | | X4 | 4× unit | | X8 | 8× unit | | X16 | Max drive |
In our example, means this is a standard inverter.
Maximum performance, used for critical paths. Library Architecture (Track Heights): tsmc standard cell naming convention
Cells specifically designed for Engineering Change Orders , often featuring metal-programmable options to allow logic changes without full layer re-fabrication.
Often include CK for clock pins, Q/QB for outputs, and S/R for set/reset signals in their internal pin naming. | Code | Relative drive | |------|----------------| | X0
Some suffixes indicate if the cell starts with a VDD or VSS rail at the boundary (e.g., BSS for ground-start), which is crucial for legal placement in the power grid. Library-Level Naming Conventions
| Code | Vt type | Speed | Leakage | |-------|----------------|-------|---------| | LVT | Low Vt | Fast | High | | RVT | Regular Vt | Medium| Medium | | HVT | High Vt | Slow | Low | | ULVT | Ultra-low Vt | Fastest| Highest | | ELVT | Extreme low Vt | (deprecated in some nodes) | | Often include CK for clock pins, Q/QB for
Sometimes you will see a suffix like V or C :
Ultra-low or ultra-high variants for advanced nodes. Physical Architecture Identifiers
However, the fundamental logic remains: [Function][Strength][VT][Power][Process]
Older nodes (e.g., 180nm, 130nm) may use SVT (Standard Vt) instead of RVT.